This paper proposes a new space vector pulse width modulation (SVPWM) algorithm for multilevel inverters that achieves a minimum number of switch state changes in one sampling cycle in order to reduce switching losses. The algorithm can be implemented with minimum computational burden and it does not require any look-up tables. The essence of the technique is to exploit the redundancy of switching functions in the implementation of the voltage vectors and dividing the entire vector space into three sectors in which switching functions have some common features. Careful observations showed that these common features lend themselves to be expressed as closed form analytical equations that can be readily implemented in an embedded digital platform. The concepts are developed using a three-level inverter. However, generalized equations are given so that the proposed technique can be applied to inverters with an arbitrary number of levels.